As a structure suitable for speeding up the data access time of an SRAM, are examples in which a power supply line is formed in a two-layer structure of a semiconductor layer and a conductive layer, as disclosed in Japanese Patent Unexamined Publication JP-A-(HEI)02-26067 (published on Jan. 29, 1990). According to this reference, a power supply line is formed in a two-layer structure using polycrystalline silicon for the semiconductor layer and tungsten silicide for the conductive layer.
In the structure disclosed in above-mentioned publication, however, there is a possibility that a value of a resistance layer exceeds a designed value and that characteristics do not satisfy desired values since a high resistance semiconductor layer forming a resistance layer extends to a power supply layer. Furthermore, since the conductive layer is formed directly on the high resistance semiconductor layer, there is a possibility that the value of the high resistance layer greatly contributes to the resistance of the power supply layer, in case there is no good contact between both layers is not good. Further, a power supply line is formed by patterning of the conductive layer after the conductive layer is formed on the semiconductor layer in the manufacturing method thereof. Thus, it involves a problem that the resistance value is apt to vary depending on a quantity of etching of the conductive layer on the resistance layer, and it is very difficult to obtain a desired resistance value of the resistance layer.